Methods and apparatus to test multi clock domain data paths with a shared capture clock signal

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United States of America Patent

PATENT NO 8707117
APP PUB NO 20120102376A1
SERIAL NO

12908630

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Abstract

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Methods, circuits and systems are provided to test data paths that traverse multiple clock domains using a common capture clock that is applied to multiple domains. Test data is launched to a first clock domain, and each of the clock domains is selected to receive the common capture clock signal while the test data propagates through the selected clock domain. The test data is capture after it has propagated through each of the multiple domains in response to the shared domains. Applying a common capture clock to each of the different domains eliminates hold time errors that might otherwise occur as the data transitions from one clock domain to another.

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Patent Owner(s)

Patent OwnerAddress
ONESTA IP LLC2 PAUL ROAD WAYNE PA 19087

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Shtulman, Ari Ft. Collins, US 1 1
Tokuz, Ahmet Santa Clara, US 5 2
Tucker, Karen Ft. Collins, US 10 427

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