Dynamic clock switch mechanism for memories to improve performance
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United States of America Patent
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Oct 20, 2009
Grant Date -
Oct 11, 2007
app pub date -
Apr 2, 2007
filing date -
Apr 6, 2006
priority date (Note) -
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Abstract
This invention improves cache operation by dynamically extending one state of a clock signal supplied to a cache on operation cycles when a cache fill operation will occur. The dynamic extension of the clock signal includes delaying the clock signal, forming a waveform toggling between states upon each predetermined state transition of the delayed clock signal, selecting the clock signal when this waveform has a first stage, and selecting the delayed clock signal when this waveform has a second state. Dynamic extension is prevented during a test mode. An apparatus of this invention uses a flip-flop and a multiplexer to produce the dynamically delayed clock.
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