Method and apparatus for reducing particle contamination on wafer backside during CVD process

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United States of America Patent

PATENT NO 6413321
SERIAL NO

09731601

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Abstract

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Backside particle contamination of semiconductor wafers subjected to chemical vapor deposition is significantly reduced by optimizing various process parameters, alone or in combination. A high quality oxide seasoning layer is deposited to improve adhesion and trapping of contaminants remaining after a prior chamber cleaning step. Second, wafer pre-heating reduces thermal stress on the wafer during physical contact between the wafer and heater. Third, the duration of the gas stabilization flow of thermally reactive process gas species prior to CVD reaction is reduced, thereby preventing side products produced during this stabilization flow from affecting the wafer backside. Fourth, the wafer heater is redesigned to minimize physical contact between the heater surface and the wafer backside. Redesign of the wafer heater may include providing only a few, small projections from the top wafer surface, and also may include providing a continuous circumferential rim supporting the edge of the wafer to interfere with the flow of process gases to the wafer backside during processing.

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Patent Owner(s)

Patent OwnerAddress
APPLIED MATERIALS INC3050 BOWERS AVENUE SANTA CLARA CA 95054

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Berken, Lloyd Fremont, CA 3 580
Cappello, Emanuele Saratoga, CA 1 552
Khalili, Davood Santa Clara, CA 4 601
Kim, Bok Hoen San Jose, CA 114 6548
Le, Nam San Jose, CA 19 788
Madhava, Ameeta San Francisco, CA 2 566
Seamons, Martin San Jose, CA 9 1011
Silvetti, Mario Dave Morgan Hill, CA 7 1663

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