Encapsulation method for localized oxidation of silicon with trench isolation

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United States of America Patent

PATENT NO 5455194
SERIAL NO

08398844

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Abstract

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A method for the fabrication of a trench isolation region (44) includes the deposition of first, second, and third oxidizable layers (28, 34, 42). The first oxidizable layer (28) is deposited to overlie the surface of a trench (12) formed in a semiconductor substrate (10). The first oxidizable layer (28) also fills a recess (26) formed in a masking layer (14), and resides adjacent to the upper surface of the trench (12). After oxidizing the first oxidizable layer (28), a second oxidizable layer (34) is deposited to fill the trench (12). A third oxidizable layer (42) is deposited to overlie the second oxidizable layer (34) and fills a remaining portion of the recess (26). An oxidation process is performed to oxidize oxidizable layer (42) and a portion of second oxidizable layer (34) to form a trench isolation region (44). In an alternative embodiment of the invention, a shallow isolation region (46) is formed in proximity to the trench isolation region ( 44).

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Patent Owner(s)

Patent OwnerAddress
MOTOROLA INCLAW DEPARTMENT IL01 - 3RD FLOOR 1303 E ALGONQUIN SCHAUMBURG IL 60196

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Masquelier, Michael P Phoenix, AZ 8 202
Roth, Scott S Austin, TX 29 901
Vasquez, Barbara Austin, TX 45 1339

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